This invention relates to an integrated circuit (IC) that is able to effect a function based on a command sent to it, a subsystem including the IC, a system including the subsystem and an associated method of effecting the function. More particularly, this invention relates to an integrated circuit (IC), a subsystem including the IC, a system including the subsystem and a method for effecting a reset function without the use of a separate reset input of the IC.
During normal mode or test mode operation of some ICs, the occurrence of errors may cause the ICs to freeze and lock up, and error recovery mechanisms may not always work. In such situations, it is desirable to perform a “reset” to put the ICs back into a normal condition or initial state. If such an IC is coupled to a controller, the controller typically sends a reset signal to a dedicated reset input of the IC to reset the IC. However, not all ICs have a reset input for receiving such an external reset signal. For ICs that do not have a reset input, a number of approaches are available for resetting the IC. One approach is to remove and restore power to the IC to make the IC reset. However, such an approach requires the IC hardware to be shut down and powered up again, resulting in the IC taking a significant period of time to recover. In a test mode, such a long recovery time adds to the testing time of the IC and, as a result, increases the cost of testing the IC.
U.S. Pat. No. 5,675,271, Baqai, entitled “Extended Chip Select Reset Apparatus and Method” discloses another approach for resetting an IC without the need for a separate reset input. A chip select line of the IC is used for resetting the IC instead. To reset the IC, a controller coupled to the IC maintains the chip select line in an active state for at least a predetermined length of time corresponding to a number of data clocks. When such a state is detected by the IC, a reset signal is generated internally to reset the IC. Such an approach does not require the IC to be shut down and powered up again, thus reducing its recovery time.
There is, however, a need to at least provide an alternate approach to resetting an IC that may prove to be more robust than the approach disclosed in U.S. Pat. No. 5,675,271.